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 FM-Tuner
TUA 4310X TUA 4310XS
Preliminary Data Features
q q q q q q q q q q
Bipolar IC
Double-balanced mixer High RF-input impedance Sym. and unsym. operation AGC-generation for PIN-Diodes and MOSFET's Strictly symmetrical RF-parts P-DSO-20-1 Decoupled counter output High supply voltage ripple rejection 2-pin oscillator First IF-amplifier adjustable gain Second IF-amplifier adjustable temperature coefficient
P-SSOP-20-1
Type TUA 4310X TUA 4310XS Circuit Description
Ordering Code Q67006-A5054 Q67006-A5203
Package P-DSO-20-1 Tape and Reel P-SSOP-20-1 Tape and Reel
The TUA 4310X has been designed as integrated tuner with strictly symmetrical RF-parts for use in car radios. In addition the IC provides a prestage control and an IF post amplification. The IC is especially suitable for use in car radios with prestage control and distributed IF-selection. The integrated circuit includes an 2-pin oscillator with symmetrical input, buffered output and a double balanced mixer for frequency conversion. The RF-input stage allows symmetrical and unsymmetrical operation. The resulting IF is amplified in a first linear IF-driver with adjustable gain and in a second IF-driver with an adjustable temperature coefficient. Between these drivers an additional IF-selection is recommended. The AGC-stage integrated for prestage control can drive PIN-Diodes as well as MOSFET's. The IC also includes a reference voltage source with high supply voltage ripple rejection.
Semiconductor Group 1 11.94
TUA 4310X TUA 4310XS
Pin Function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Function RF-input for mixer RF-input for mixer AGC-threshold Ground Reference voltage Oscillator Oscillator Decoupled oscillator output (counter) IF-driver temperature coefficient adjust IF-driver 2 output IF-driver 2 input IF-driver 1 gain adjust IF-driver 1 output IF-driver 1 decouple IF-driver 1 input Supply voltage AGC-time constant AGC-output for the prestage control Mixer output Mixer output
Semiconductor Group
2
TUA 4310X TUA 4310XS
Block Diagram
Semiconductor Group 3
TUA 4310X TUA 4310XS
Absolute Maximum Ratings TA = - 40 to 85 C Parameter Symbol Limit Values min. Supply voltage Mixer max. 13.2 13.2 V V Unit Remarks
V16 V19, V20
0 0
Currents: All pins are short-circuit protected against ground. ESD-Protection IF2-DC Thermal resistance system-air Operating Range Supply voltage Ambient temperature
VESD I9 Rth SA
-4
4 5 105
kV mA K/W
HBM (1.5 k, 100 pF)
V16 TA
7.5 - 40
13.2 85
V C
Absolute Maximum Ratings TA = - 40 to 85 C Parameter Symbol Limit Values min. Supply voltage Reference voltage Total gain max. 42 5.1 37 mA V dB Unit Test Condition
V16 V5 G0
0 4.5 21
I16 + I19 + I20; V12 = 1.2 V; a = 0; V3 = 4 V
G0 = 20 Ig (V10/V1,2); a = 0; GIF1 = 15 dB; GIF2 = 15 dB
(incl. - 12 dB CER1 + CER2)1)
Notes see page 5.
Semiconductor Group
4
TUA 4310X TUA 4310XS
Absolute Maximum Ratings (cont'd) TA = - 40 to 85 C Parameter Symbol Limit Values min. Mixer Interceptpoint third order Noise figure Mixer gain Input impedance2) Input impedance3) Input impedance4) Input impedance5) Input impedance6) max. Unit Test Condition
IP3 NF G R Rsym Csym Rasym Casym
110 10
dB/V dB dB k k pF k pF
V1, 2 100 mVrms
Gmix = 20 Ig (V15/V1,2)
(incl. - 6 dB CER1)1)
Optimum generator for XN noise matching7) Oscillator Interference modulation Output signal Output impedance (resistive) Operating frequency
1) 2) 3) 4) 5) 6) 7)
f
5 115 270 390 160
Hz mVrms RL = 300 MHz
V8 R8 fOSC
CER-filters SFE 10.7 + additional correction to - 6 dB. Internal resistance between input pin and internal VREF. Real part of sym. input impedance. Imaginary part of sym. input impedance. Real part of asym. input impedance. Imaginary part of asym. input impedance. Optimum generator impedance for noise minimum.
Semiconductor Group
5
TUA 4310X TUA 4310XS
AC/DC Characteristics TA = 25 C; V16 = 10 V; fIF = 10.7 MHz, fHF = 100 MHz; QIF = 10 (CLC = 100 pF) Parameter Symbol Limit Values min. typ. max. Control Voltage Generation (see diagram 4) Control voltage for prestage Output current Saturation voltage Unit Test Condition
V17 V17 I18 I18 V18
5.3 0 7 0
5.9
6.5 0.1
V V mA mA
V3 = 2.5 V; V1,2 = 0 mVrms V3 = 2.5 V; V1,2 = 30 mVrms V3 = 2.5 V; V1,2 = 0 mVrms V3 = 2.5 V; V1,2 = 50 mVrms V17 = 6 V; R16, 18 = 1 k
10
14 0.1
0.250 V
IF-Amplifier 1 (see diagram 2 and 5) Input resistance Input capacitance Output resistance Output capacitance Voltage gain
R15 C15 R13 C13 GIF1 min
270
330 390 5
pF pF
270
330 390 3
2
5
8
dB
V13 Gu = 20 lg ----------V15 RL = 330 , V12 = 4 V
Voltage gain
GIF1 max
21
25
29
dB
V13 Gu = 20 lg ----------V15 RL = 330 , V12 = 1.2 V R6 = 330 , V12 = 1.2 V
Noise figure
NFIF1
10
dB
Semiconductor Group
6
TUA 4310X TUA 4310XS
AC/DC Characteristics (cont'd) TA = 25 C; V16 = 10 V; fIF = 10.7 MHz, fHF = 100 MHz; QIF = 10 (CLC = 100 pF) Parameter Symbol Limit Values min. typ. max. IF-Amplifier 2 (see diagram 1 and 3) Input resistance Input capacitance Output resistance Output capacitance Voltage gain Unit Test Condition
R11 C11 R10 C10 GIF2
13 270
330 6 330 390 3 15 17
pF pF dB
V10 Gu = 20 lg ----------V11 RL = 330 , a = 0 TA = 300 K RG = 330 , RL = 330 V/VQ = (T/TA) a
Noise figure Temp. coefficient range Gain versus range temp. Gain versus range temp.
NFIF2 a G/G0 G/G0
0
6
8 3
dB
0.09 0
dB/K dB/K
a=3 a=0
Semiconductor Group
7
TUA 4310X TUA 4310XS
Test Circuit
Semiconductor Group 8
TUA 4310X TUA 4310XS
Application Circuit
Semiconductor Group 9
TUA 4310X TUA 4310XS
Diagram 1 Computing the TC Compensator IF-Amplifier
G0: Gain (15 dB = 5.62) TA = 300 K : TC gradient ( = 0 ... 3) R 1 = ------------------------------------------ = G 0 ( 1.2 + 0.8 )
1 R 2 = ----------------------------------- = -
15231
[ 2558 for = 0 ] [ 753 for = 3 ]
2R ( 1.5 + ) 1 + 2
[ 6775 for = 0 ] [ 968 for = 3 ]
a = 0 0 dB = a = 1.38 0.04 dB/K = 0.08 dB/K a = 2.77 =
G T ------ (dB) = x 8.685 x -----G0 TA
Semiconductor Group
10
TUA 4310X TUA 4310XS
Diagram 2
Diagram 3
Semiconductor Group 11
TUA 4310X TUA 4310XS
Diagram 4
Diagram 5
Semiconductor Group 12
TUA 4310X TUA 4310XS
Package Outlines
Plastic-Package, P-DSO-20-1 (SMD) (Plastic Dual Small Outline Package)
Plastic-Package, P-SSOP-20-1 (Plastic Shrink Small Outline Package)
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information" SMD = Surface Mounted Device
Semiconductor Group 13
Dimensions in mm
GPS05387
GPT05167


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